We can use logic lows or Karnaugh map to reduce a logic expression. Nevertheless, what is our last objective? What we should look for when we are reducing a logic expression.
- Get it down to same type of gates
We know that logic gates come as ICs, which include most probably four or six same type of logic gates. Therefore, if we reduce it to four logic gates of same kind it is better than reducing it to two logic gates of different kinds.
- Think of the propagation delay
All inputs should go though same number of logic gates (Which is known as logic level)
- Decide on whether to use SOP(sum of product) or POS(product of sum) using no of ones in the logic table(truth table)
